1Eclipse SeriesRF [email protected], 2003Revision 2T50 TransmitterOperation and Maintenance ManualThis manual is produced by
10AN4 is multiplexed between the LINE control potentiometer and the Channel referencecrystal’s temperature sense. Which analogue input drives this an
11CH_EN is a serial bus select. It is brought out to the rear panel and is used to interfaceto the channel encoder on the rear daughter-board. (See 5
12MORSE is a CPU output that can be used to generate a CWID (Continuous WaveIdentification) code. This is a 1028Hz tone which is keyed on and off in
13Note that the Line inputs, and the TONE input, are protected by transils and fusesagainst accidental connection to damaging voltages. The fuses (F3
14isolation, and R446, and R448 set the level to be approximately 30% of maximumdeviation.The output of U407B is passed (signal LINE_INP) to the Line
15The digital POT performs two functions. It is used to help set the maximum CTCSStone deviation. It does this in conjunction with U500, as it is al
16The output of the Modulation VCO is connected back to the PLL for phase detection viasignal path MOD_VCO_OUT.The phase detector output is also buffe
17The two unused, divide by two, stages of U606 are then used to convert the 400HzFoLD pulse trains into 200Hz square waves for the Timer inputs of th
18The VCO frequencies are controlled by the bias applied to D701 and D704 respectively,which is set by signals MOD_PLL_IN and CHAN_PLL_IN. These sign
195.8 1W Broadband HF/VHF Power Amplifier (Sheet 8)The RF output of Sheet 7 (VCO_OUT) becomes the primary input to this circuit(RF_IN).This RF input i
2Contents1 Operating Instructions 51.1 Front Panel Controls and Indicators 51.1.1 PTT 51.1.2 Line 51.1.3 POWER LED 61.1.4 TX LED 61.1.5 ALARM LED 62 T
206 FIELD ALIGNMENT PROCEDURE6.1 Standard Test EquipmentSome, or all of the following equipment will be required:• AF signal generator, 75 - 3000Hz fr
21b) dev: Maximum deviations are set (automatically forces a “cal line” and a “caltone”)c) line: Line1, Line 2, Dir Aud (Tone), and microphone inputs
22To compensate for crystal ageing and other component parameters that drift over time,the following procedure should be performed approximately once
23If a message, similar to this is seen, it indicates a potential fault condition. If the finaltext indicates that the channel and mod reference erro
24?In response to the +, or – keys (or m, p, M, or P), the firmware adjusts the deviationdigital POT. The user should do this until the deviation is
25This is the same mechanism that is used in 6.5 and 6.6. The user enters +, p, or P toincrease the Line 1 gain, to increase the deviation, or, -, m,
26This procedure is used to calibrate an External Power Amplifier.The existing PA's SERIAL NO is: 002356Enter the new PA serial no:Simply hit t
27the displayed reverse power equals 50W.Enter <RET> when this has been done.This then completes all the calibration procedures.7 SPECIFICATIONS
28code containing the selected DCS code word will be generated continuously after theexciter is keyed up.7.1.4 Channel ProgrammingThe channel informat
297.4.2 Frequency Range and Channel SpacingThe T50, as a single model, covers the full band, and all channel spacing.Frequency 25 kHz 20kHz 15kHz 12.5
37.1 Overall Description 287.1.1 Channel Capacity 287.1.2 CTCSS 287.1.3Channel Programming287.1.4 Channel Selection 297.1.5 Microprocessor 297.2 Physi
307.4.14 Test Microphone Input200Ω dynamic, with PTT7.4.15 External Tone InputCompatible with all RF Technology receivers. Each unit is factory confi
31transmissions. The Hang Time can be individually set on each channel for 0 - 999seconds.Time Out Timer - A time-out or transmission tim
32A Engineering DiagramsThere is only one printed circuit board covering all models of the T50. There is onlyone option for this product, which is th
33B T50 Parts List (Rev 4)RefDescriptionPart #C100Four EMI filters in a 1206 package, 100pF34/NFA3/1100C101Four EMI filters in a 1206 package, 100pF3
34C422100nF, 25V, Y5V, decoupler, 060346/63Y1/100NC423Ceramic Capacitor, 16V, 1uF, X7R, 120645/X7R1/1U16C425Ceramic Capacitor, 16V, 1uF, X7R, 120645/X
35C651100nF, 25V, Y5V, decoupler, 060346/63Y1/100NC65210nF Cer. Cap, X7R, 0603, 10%46/63X1/010NC700100nF, 25V, Y5V, decoupler, 060346/63Y1/100NC70110
36C76712pF Cer. Cap, NPO, 0603, 5%46/63N1/012PC76815pF Cer. Cap, NPO, 0603, 5%46/63N1/015PC76968pF Cer. Cap, NPO, 0603, 5%46/63N1/068PC770100nF, 25
37D303Dual Series Diode21/3010/AV99D304Dual Series Diode21/3010/AV99D305Dual Series Diode21/3010/AV99D306Gen. Purpose 1N4004 diode in SMD pkg24/SMA1/4
38L724330nH Inductor37/3320/330NL7253u3H Choke37/3320/P101L72633nH Inductor37/8551/082NL800Ferrite, 1206 pkg, 600 ohm, 200mA37/P033/0001L801Ferrite, 1
39R2040805, 1%, 10K resistor51/8511/010KR2050805, 1%, 2K2 resistor51/8511/02K2R2060805, 1%, 2K2 resistor51/8511/02K2R2070805, 1%, 68K resistor51/8511/
41 Operating Instructions1.1 Front Panel Controls and Indicators1.1.1 PTTA front-panel push-to-talk (PTT) button is provided to facilitate bench and
40R3250805, 1%, 47K resistor51/8511/047KR3260805, 1%, 47K resistor51/8511/047KR3270805, 1%, 47K resistor51/8511/047KR3280805, 1%, 10K resistor51/8511/
41R4590805, 1%, 4K7 resistor51/8511/04K7R4600805, 1%, 4K7 resistor51/8511/04K7R4610805, 1%, 56K resistor51/8511/056KR4620805, 1%, 22K resistor51/8511/
42R6250805, 1%, 22K resistor51/8511/022KR6260805, 1%, 2K2 resistor51/8511/02K2R6271218, 5%, 150R, 1W, SMD resistor51/2851/0150R6281218, 5%, 150R, 1W,
43R8031218, 5%, 150R, 1W, SMD resistor51/2851/0150R8041206 10R resistor51/3380/0010R8051206 10R resistor51/3380/0010R8061218, 5%, 150R, 1W, SMD resi
44U604Dual PLL29/LMX2/335LU605Dual, Ripple Carry, 4 bit binary counter29/2030/C393U606Dual 4 bit, ripple carry, decade counters29/2030/C390U607Gen. Pu
45C T50 Parts List (Rev 3) The following table highlights those components in Rev. 3 exciters, that differ from theparts in Rev. 4. The values indic
46LC701NFLC702NFQ402Gen. Purpose PNP transistor in SOT-2327/3010/3906R3130805, 1%, 120K resistor51/8511/120KR3140805, 1%, 22K resistor51/8511/022KR315
47D EIA CTCSS TONESFrequencyEIA NumberNo Tone67.0A171.9B174.4C177.0A279.7C282.5B285.4C388.5A391.5C494.8B3100.0A4103.5B4107.2A5110.9B5114.8A6118.8B6123
1 1Block Flow Diagram of Audio and RF signals in 9154(T50)05/9 A8-Apr-2003 10:28:51D:\Protel Files\Copies from Crocodile\t50_4.ddb - Issue4\BLOCK_DIA
1 2 3 4 5 6 7 8ABCD87654321DCBA1 1Rear Panel Board for 9154 (T50) and 9155 (R50)05/9160 R7 116-Aug-2002 09:56:54F:\Obsoleted Files\Old Files Backup\91
54 flashes, pauseEither PLL is near its operational limit3 flashes, pause Unable to communicate with the External PA.2 flashes, pauseThe current chan
1 2 3 4 5 6 7 8ABCD87654321DCBA5 9Tone Generation Section9154 B20-Feb-2002 23:41:52C:\Program Files\Design Explorer 99 SE\rft\t50\t50.Ddb - tonetx.sch
1 2 3 4 5 6 7 8ABCD87654321DCBA6 9Frequency Synthesiser9154 B20-Feb-2002 23:40:44C:\Program Files\Design Explorer 99 SE\rft\t50\t50.Ddb - siggen.schTi
1 2 3 4 5 6 7 8ABCD87654321DCBA9 9Power Generation Section9154 B20-Feb-2002 23:40:01C:\Program Files\Design Explorer 99 SE\rft\t50\t50.Ddb - power.sch
1 2 3 4 5 6 7 8ABCD87654321DCBA8 9Broadband Power Amplifier9154 B20-Feb-2002 23:39:04C:\Program Files\Design Explorer 99 SE\rft\t50\t50.Ddb - pa.schTi
1 2 3 4 5 6 7 8ABCD87654321DCBA2 9Microprocessor9154 B20-Feb-2002 23:32:55C:\Program Files\Design Explorer 99 SE\rft\t50\t50.Ddb - micro.schTitleSize:
1 2 3 4 5 6 7 8ABCD87654321DCBA1 9T50 Master Schematic9154 B20-Feb-2002 23:28:58C:\Program Files\Design Explorer 99 SE\rft\t50\t50.Ddb - Master.schTit
1 2 3 4 5 6 7 8ABCD87654321DCBA4 9Line Input Processing Section9154 B20-Feb-2002 23:31:21C:\Program Files\Design Explorer 99 SE\rft\t50\t50.Ddb - line
1 2 3 4 5 6 7 8ABCD87654321DCBA3 9Audio Processing Section9154 B20-Feb-2002 23:30:34C:\Program Files\Design Explorer 99 SE\rft\t50\t50.Ddb - audio.sch
1 2 3 4 5 6 7 8ABCD87654321DCBA7 9Voltage Controlled Oscillators9154 B20-Feb-2002 23:42:46C:\Program Files\Design Explorer 99 SE\rft\t50\t50.Ddb - vco
62.2 LINE TerminationsThere are two main audio inputs, plus a direct audio (TONE) input. The direct audioinput is a High Impedance Balanced DC input,
7message is sent. If this timer value is negative, then CWID transmission is disabled.This feature is only available on models from Rev. 4.2.11 CWID
8SPARE_SEL 5 Spare Select (for future use)600Ω/HiZ LineLine1+Line1-819Transformer Isolated Balanced 0dBmInput600Ω/HiZ LineLine2+Line2-1022Transformer
95 Circuit DescriptionThe following descriptions should be read as an aid to understanding the block andschematic diagrams given in the appendix of th
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